Chi-Ying TSUI (PhD, Southern California, 1994)

Associate Professor

Research Interests

VLSI design and CAD algorithms for energy efficient high performance microprocessors; power analysis and optimization for CMOS circuits; low power embedded systems design; VLSI design for multimedia; high-speed network and wireless application.

Professor Tsui obtained his BS degree in Electrical Engineering from University of Hong Kong, and MS and PhD degrees in Computer Engineering from University of Southern California. During his graduate study in University of Southern California, he developed various power analysis and optimization tools for CMOS circuits. He was one of the main developers of the ADAS system (Advanced Design Automation System) in USC which is a full range design automation system for microprocessors. Professor Tsui received the IEEE Transactions on VLSI System Best Paper Award in 1995. He has reviewed several IEEE transactions and journals, and he served on the organization committee of ASP-DAC'99 and program committees of IEEE ISLPE, VLSI, ASP-DAC and conferences. He also consulted for local and multinational companies. He is an IEEE member.

Recent Publications

• K.W. Wong, C.Y. Tsui, R.S. Cheng, and W.H. Mow, "Maximum Likelihood Lattice Decoding for MIMO Channels", IEICE Trans. on Communication, Vol. E84-B, No. 10, Oct. 2001.

• Oliver Leung, Chi-Ying Tsui, and Roger S-K. Cheng, "Reducing Power Consumption of Turbo Code Decoder Using Adaptive Iteration with Variable Supply Voltage", IEEE Transactions on VLSI Systems, Vol. 9, Issue 1, pp. 34-41, Feb. 2001.

• Zhong-Li He, Chi-Ying Tsui, Kai-Keung Chan, and Ming L. Liou, "Low Power VLSI Design for Motion Estimation Using Adaptive Pixel Truncation", IEEE Transactions on Circuit and Systems on Video Technology, Vol. 10, Issue 5, pp. 669-678, Aug. 2000.

• Chi-Ying Tsui, Roger S-K. Cheng, and Curtis Ling, "Low Power Rake Receiver and Viterbi Decoder Design for CDMA Applications", International Journal on Wireless Personal Communications, Vol. 14, No. 1, pp. 49-64, Jul. 2000.

• Chin-Tau Lea, Chi-Ying Tsui, Bo Li, Louis Kwan, Stanley Chan, and Angus Chan, "A/I Net: A Network That Integrates ATM and IP", IEEE Network, Vol. 13, No. 1, pp. 48-55, Jan.-Feb. 1999.

• Chi-Ying Tsui, Massoud Pedram, and Alvin Despain, "Low Power State Assignment Targeting Two- and Multi-level Logic Implementations", IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems, Vol. 17, No. 12, pp. 1281-91, Dec. 1998.

• Chih-Shun Ding, Chi-Ying Tsui, and Massoud Pedram, "Gate-Level Power Estimation Using Tagged Probabilistic Simulation", IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems, Vol. 17, No. 11, pp. 1099-107, Nov. 1998.